MEMS technology is employed in many sensors, such as accelerometers, and gyroscopes. Many such devices employ a partially released proof mass which undergoes a physical displacement relative to a substrate in response to an external stimulus. Detection of this physical displacement may be detrimentally impacted by residual stresses in the MEMS structure, particularly stress gradients across a thin film thickness, which cause a structure to deflect upon its release from the substrate. Any such deflection has the potential of introducing static errors in the sensor readout in absent of any external stimuli, and may limit the sensitivity and/or accuracy of the sensor.
To date, commercial MEMS sensor implementations rely on a “two-chip” approach where the MEMS structure is contained on a first chip while a control circuit is provided on another (e.g., an ASIC). For this approach, the MEMS structure is typically fabricated in bulk silicon substrate layers (e.g., an SOI layer), or surface micromachined into a polycrystalline semiconductor layer (e.g., silicon or SiGe). In general, for either of these techniques, the structural semiconductor material has very good mechanical properties with low intrinsic stress that might otherwise detrimentally impact sensor performance and/or complicate manufacturing in a manner that increases cost or decreases yield.
The two-chip approach suffers from higher costs and larger form factors than would a single chip solution. However, single-chip approaches have been hindered by the need to have the MEMS structures formed from low-stress films. MEMS structures having designs that are more tolerant of intrinsic film stress would permit a broader choice in the films employed for the MEMS structure and therefore enable further integration of MEMS with conventional integrated circuit technology, such as CMOS, facilitating a single-chip solution.